How performant is this - are we able to achieve similar speeds as an actual 68k Mac on embedded hardware?
At 8 MHz, a 68k can execute at most 2M instructions per second. So the answer is going to be yes, if this manages to execute one 68k instruction per ~200 cycles.
I think executing an instruction is going to be closer to 20-50 cycles than 200, so it should be much faster than a real 68k CPU.
I think performance is likely to be in the ballpark of a 68040 @20 MHz, but that's just a guess. This would leave 20 cycles for each emulated instruction. With JIT you could reach 200 MHz+ comparable speeds.
Everything is coming from PSRAM including frame buffer (at 15 fps) so performance is going to be abysmal.
You should be able to cache hot code and data in the SRAM. Although it'd significantly increase complexity.
The P4 is pretty high spec with a 400MHz dual-core RISC-V
Especially as there is a decent working BasiliskII port for the PlayStation Portable with its 333MHz single-core MIPS CPU.
Looking at the M5Stack Tab5 IoT Development Kit [1] based on the ESP32-P4 - it's a really nice piece of kit.
[1] https://shop.m5stack.com/products/m5stack-tab5-iot-developme...
Yeah, the first thing I thought of when seeing this was "how long till this tablet thingy will be out of stock everywhere?".
Pity that this isn't for the Cardputer (a M5Stack device that includes a built in (tiny) screen and keyboard), although it might be impractical on it.
Hoping rePalm ends up there, too! https://dmitry.gr/?r=05.Projects&proj=27.%20rePalm
How performant is this - are we able to achieve similar speeds as an actual 68k Mac on embedded hardware?
At 8 MHz, a 68k can execute at most 2M instructions per second. So the answer is going to be yes, if this manages to execute one 68k instruction per ~200 cycles.
I think executing an instruction is going to be closer to 20-50 cycles than 200, so it should be much faster than a real 68k CPU.
I think performance is likely to be in the ballpark of a 68040 @20 MHz, but that's just a guess. This would leave 20 cycles for each emulated instruction. With JIT you could reach 200 MHz+ comparable speeds.
Everything is coming from PSRAM including frame buffer (at 15 fps) so performance is going to be abysmal.
You should be able to cache hot code and data in the SRAM. Although it'd significantly increase complexity.
The P4 is pretty high spec with a 400MHz dual-core RISC-V
Especially as there is a decent working BasiliskII port for the PlayStation Portable with its 333MHz single-core MIPS CPU.
So this should be much easier.
VMac would be lighter.